library IEEE;
-- Hier komen de gebruikte libraries:
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;



entity counter is
	port (	clk		: in	std_logic;
		reset		: in	std_logic;

		count_out	: out	std_logic_vector (19 downto 0)
	);
end entity counter;



architecture behavioral of counter is
  constant MAX_COUNT : unsigned(19 downto 0) := to_unsigned(1e6,20); --1e6
  constant ZERO_UNSIGNED : unsigned (19 downto 0) := to_unsigned(0,20);
  
  signal number : unsigned(19 downto 0);
begin
  
  
  lbl_clk: process(clk, reset)
  begin

    if (rising_edge (clk)) then
      if (reset = '1' ) then
      number <= ZERO_UNSIGNED;
      else
        number <= number+1;
          if (number >= MAX_COUNT) then
          number <= ZERO_UNSIGNED;       
        end if;
      end if;
    end if;
  end process;     
  lbl_output: count_out <= std_logic_vector(number);
  
  
end behavioral;